Memory is typically provided as an integrated circuit(s) formed in and/or on semiconductor die(s), whether alone or in combination with another integrated circuit(s), and is commonly found in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.
Flash memories have developed into a popular source of non-volatile memory for a wide range of electronic applications. Flash memories typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption. Changes in threshold voltage of the cells, through programming of a charge storage structure, such as floating gates or trapping layers or other physical phenomena, determine the data state of each cell. Common uses for flash memory include personal computers, personal digital assistants (PDAs), digital cameras, digital media players, digital recorders, games, appliances, vehicles, wireless devices, cellular telephones, and removable memory modules, and the uses for flash memory continue to expand.
Flash memory typically utilizes one of two basic architectures known as NOR flash and NAND flash. The designation is derived from the logic used to read the devices. In NOR flash architecture, a logical column of memory cells is coupled in parallel with each memory cell coupled to a data line, such as those typically referred to as digit (e.g., bit) lines. In NAND flash architecture, a column of memory cells is coupled in series with only the first memory cell of the column coupled to a bit line (e.g., by a select gate).
Content addressable memories (CAM) are memories that implement a lookup table function. They use dedicated comparison circuitry to perform the lookups. CAMs are often used in network routers for packet forwarding and the like. Each individual memory cell in a traditional CAM requires its own comparison circuit in order to allow the CAM to detect a match between a bit of data of a received (e.g., “unknown”) feature vector and a bit of data of a feature vector (e.g., a known feature vector) stored in the CAM. Typical CAM cells use approximately nine to ten transistors for a static random access memory (SRAM)-based CAM, or four to five transistors for a dynamic random access memory (DRAM)-based CAM.
CAMs store input feature vectors for later comparison (e.g., as part of searching). An input feature vector can include a plurality of attributes (e.g., terms, features, etc.), such as those that define an object. For example, an input feature vector for a person might include attributes such as hair color, height, weight, and other features that can be used to uniquely identify a particular person.
FIG. 1 illustrates a typical prior art classification system for an input feature vector 100. The system can have multiple known groups of data feature vectors 101, 102, 103 stored in memory. These data feature vectors are shown in FIG. 1 in terms of an x-y coordinate system in order to illustrate a typical prior art method for determining the data feature vector (e.g., a single feature vector or a group of feature vectors 101-103) of the data feature vectors to which the input feature vector is closest.
An initial search of the CAM using the input feature vector 100 might not turn up an exact match to a data feature vector already stored in the CAM. It might be desirable to then find the data feature vector(s) to which the input feature vector is closest. This can be accomplished by determining a shortest x and/or y distance between the input feature vector and the data feature vector(s). However, such a distance comparison method can be a time consuming process since a large number of data feature vectors can require a large number of distance comparisons.
For the reasons stated above and for other reasons that will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a more streamlined approach for comparison of a received (e.g., input) feature vectors to stored (e.g., data) feature vectors.